Programming docs for the PAOLA parallel chip This document is freely distributable as long as it is not changed, and one of the sources www.jschoenfeld.com, www.jschonfeld.de, www.siliconsonic.com is mentioned. last update: March 2nd, 2001 General ------- PAOLA is a chip yet to be used in one of individual Computers' products. The name stands for PArallel On Logic Adapter, because it is based on a MACH programmable logic chip. Mainly, it is a common parallel port as it has been designed by IBM nearly 20 years ago. However, it has some advantages over the old designs: - port is bi-directional, making it compatible with Scanners, ZIP drives etc. - high-speed access of 45ns is possible - IRQ is stored, so no IRQ is missed in a highly loaded multitasking enviroment PAOLA is software-compatible to PC-parallel ports, making software drivers really easy for it. If your drivers do not use IRQs, no adaption is needed. Using IRQs requires little or no modification of your existing software. Electrical ---------- The host interface is a combined Intel/Motorola interface. This means, Intel I/O timing is used for processor accesses, but the reset and IRQ pins are active-low, just like Motorola processors require. An inactive IRQ is represented by a free-floating line (high-z), making the device capable of shared IRQs. A chip-reset will reset ALL outputs, including the eight data pins (which is quite unusual compared to PC-Parallel chips). Reset also disables the host interface, so accidential CS, IOR or IOW assertion during reset does not affect the bus. Further, any pending IRQ is deasserted, and IRQs will be disabled. This ensures that the chip will not issue any IRQ until the drivers have initialized the chip, thus maximizing system-startup reliability. Read and write accesses can be both, CS-triggered or IOR/IOW triggered. Accesses should be at least 45ns long to ensure that the data has come through all gates that may cause a propagatin delay, including external host buffers. This is met in all existing Amiga circuits, including the high-speed timing that is generated be the Maxxler chip. A Direction output line can be used to select the direction of a 74ls245 driver for the host interface. A similar signal is available for the eight data lines of the parallel port. It is recommended to use drivers for all lines that can be configured as outputs. Registers --------- Two address lines select one of four registers. The first three are compatible with most PC-parallelport chips, the fourth is a modified status register, not really necessary for many applications: 0: Data register Writing to this register puts the binary value to the eight parallelport pins, if in output mode. If the chip is in input mode, the data written to this register IS NOT STORED. If you want to output data, set the appropriate mode FIRST. Reading this register gives the binary value of the eight data pins of the parallel port. If in input mode, it's the value that comes from any device (printer, scanner, ZIP drive), if in output mode, it's the feedback of what you have written to the register. Caution: Some PC-Parallelports allow using the port as input when in output mode. If the driver on the printer side is just "stronger" than the driver on the computer side, the feedback really represents the state on the line. Since line drivers are recommended for PAOLA, the feedback in register 0 will always contain what the chip tries to drive, regardless of what is really present on the cable. However, using this method for reading data into the computer is not very clever, because you could damage the port easily with this. Better go the "clean" way, use the direction bit of the control register! 1: Status register This is a read-only register. Writing does nothing. Bits 0-2 are not used. Bit 3 holds the error bit from the printer (offline, paperend) Bit 4 holds the select in bit from the printer Bit 5 holds the dedicated Paper out signal from the printer Bit 6 holds the ACK signal from the printer. This is also significant for the IRQ state of the chip! Bit 7 holds the busy bit from the printer. 2: Control register This is a read/write register. Reading gives the feedback of the value you have written EXCEPT FOR BIT 5. Bit 5 cannot be read back, it is always 0 on a read. If you need a feedback of bit 5, use bit 0 of register 3. Bit 0: strobe bit Bit 1: Autofeed Bit 2: Init Bir 3: Printer Select Bit 4: IRQ Enable (0= Disabled) Bit 5: port direction: 0= output Bits 6 and 7 are not used, and should be set 0. 3: second Status register This is a read-only register. Writing does nothing. This register is identical to register 1, except for bits 0 and 7. Bit 0 holds the feedback of register 2, bit 5 (direction control) Bits 1-2 are not used Bit 3 holds the error bit from the printer (offline, paperend) Bit 4 holds the select in bit from the printer Bit 5 holds the dedicated Paper out signal from the printer Bit 6 holds the ACK signal from the printer. This is also significant for the IRQ state of the chip! Bit 7 holds the IRQ active bit. a 1 indicates an asserted IRQ line. Handling IRQs ------------- If enabled, an IRQ will be issued on ACK from the printer. PAOLA stores this IRQ until it is served. Therefore, you should not watch the ACK bit in the status register, but the IRQ active bit in the second status register to tell if the IRQ came from this chip or not, because ACK may already have been deasserted by the printer, and you would miss an IRQ! Before leaving the IRQ, make sure that ACK is deasserted by the printer, otherwise the next IRQ will follow immediately. After having done whatever is necessary to deassert ACK, you can reset the IRQ storage bit. This is done by accessing the port register (number 0), either with a read or a write access. Resetting the IRQ storage is only possible with ACK deasserted. With ACK asserted, IRQ will be asserted again immediately after the reset, so it would be a useless operation. Resetting the IRQ can also be done by disabling IRQs with a 0 in bit 4 of the control register. If you have any comments, questions or suggestions before I start using the chip in a commercial product, send me an e-mail: jens@jschoenfeld.de. --EOF